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Welcome to PACE Lab

A warm and hearty welcome to fellow researchers, students and enthusiasts. We work in three inter-related areas: Programming Languages, Architecture and Compilers.
Our motto: Work hard, Party harder!






News

  • 2018-08-21: Paper accepted
    Congratulations to Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam for their paper acceptance: ReDRAM: A Reconfigurable DRAM Cache for GPGPUs. To appear at IEEE Computer Architecture Letters (CAL), 2018.
  • 2018-08-21: Paper accepted
    Congratulations to Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, Ramesh S, and Partha Roop for their paper acceptance: Formal Modeling and Verification of Controllers for a Family of DRAM Caches. To appear at International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2018.
  • 2018-08-17: Paper accepted
    Congratulations to Jyothi Vedurada and V Krishna Nandivada for their paper acceptance: Identifying Refactoring Opportunities for Replacing Type Code with Subclass and State. To appear at PACMPL (OOPSLA), 2018.
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PACEminars

 

    None scheduled.